Main Program
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Monday,
March 16, 2015
Keynote I: Architectural Support for
Cyber-Physical Systems, Edward A. Lee, University of California at Berkeley
Chair: Sandhya Dwarkadas, University of Rochester
·
Bio: Edward A. Lee is the Robert S. Pepper Distinguished
Professor in the Electrical Engineering and Computer Sciences (EECS) department
at U.C. Berkeley. His research interests center on design, modeling, and
analysis of embedded, real-time computational systems. He is the director of
the nine-university TerraSwarm Research Center
(http://terraswarm.org), a director of Chess, the Berkeley Center for Hybrid
and Embedded Software Systems, and the director of the Berkeley Ptolemy
project. From 2005-2008, he served as chair of the EE Division and then chair
of the EECS Department at UC Berkeley. He is co-author of nine books (counting
second and third editions) and numerous papers. He has led the development of
several influential open-source software packages, notably Ptolemy and its
various spinoffs. He received the B.S. degree in Computer Science from Yale
University, New Haven, CT, in 1979, the S.M. degree in EECS from the
Massachusetts Institute of Technology (MIT), Cambridge, in 1981, and the Ph.D.
degree in EECS from the University of California Berkeley, Berkeley, in 1986.
From 1979 to 1982 he was a member of technical staff at Bell Telephone Laboratories
in Holmdel, New Jersey, in the Advanced Data Communications Laboratory. He is a
co-founder of BDTI, Inc., where he is currently a Senior Technical Advisor, and
has consulted for a number of other companies. He is a Fellow of the IEEE, was
an NSF Presidential Young Investigator, and won the 1997 Frederick Emmons Terman Award for Engineering Education.
Session 1A:
Persistent Memory
Chair: Angela Demke Brown, University of Toronto
·
Mojim: A Reliable and Highly-Available Non-Volatile Memory
System, Yiying Zhang, Jian Yang, Amir Saman Memaripour, and Steven
Swanson (University of California, San Diego)
·
SD-PCM:
Constructing Reliable Super Dense Phase Change Memory under Write Disturbance, Rujia Wang, Lei Jiang, Youtao
Zhang, and Jun Yang (University of Pittsburgh)
·
DEUCE: Write
Efficient Encryption for Secure Non-Volatile Memories, Vinson
Young, Prashant J. Nair, and Moinuddin
K. Qureshi (Georgia Institute of Technology)
Session 1B:
Memory Models 1
Chair: Alvin Lebeck, Duke University
·
Temporally
Bounding TSO for Fence-Free Asymmetric Synchronization, Adam
Morrison (Technion) and Yehuda
Afek (Tel Aviv University)
·
Reduced
Hardware NORec: A Safe and Scalable Hybrid
Transactional Memory, Alexander Matveev and Nir Shavit (MIT)
·
Synchronization
Using Remote-Scope Promotion, Marc Orr (UW-Madison, AMD), Shuai
Che, Ayse Yilmazer, and Brad Beckmann (AMD), and Mark D. Hill and
David A. Wood (UW-Madison, AMD)
Session 2A:
Memory and Security I
Chair: John
Criswell, University of Rochester
·
GhostRider: A Hardware-Software System for Memory Trace
Oblivious Computation, Chang Liu (University of Maryland, College Park),
Austin Harris (University of Texas at Austin), Martin Maas (University of California,
Berkeley), Michael Hicks (University of Maryland, College Park), Mohit Tiwari (University of Texas
at Austin), and Elaine Shi (University of Maryland, College Park)
·
Freecursive ORAM: [Nearly] Free Recursion and Integrity
Verification for Position-based Oblivious RAM, Christopher W. Fletcher, Ling Ren, and Albert Kwon (MIT), Marten van Dijk
(UConn), and Srini Devadas (MIT)
·
Beyond the
PDP-11: Architectural support for a memory-safe C abstract machine, David Chisnall and Colin Rothwell
(University of Cambridge), Brooks Davis (SRI International), Robert N.M.
Watson, Jonathan Woodruff, Munraj Vadera,
and Simon W. Moore (University of Cambridge), Peter G. Neumann (SRI
International), and Michael Roe (University of Cambridge)
Session 2B:
Warehouse Scale Computing I
Chair: Lingjia Tang, University of Michigan, Ann
Arbor
·
Supporting
Differentiated Services in Computers via Programmable Architecture for
Resourcing-on-Demand (PARD), Jiuyue Ma (ICT,CAS), Xiufeng Sui, Ninghui Sun, Yupeng Li, Zihao Yu, Bowen Huang,
Tianni Xu, and Zhicheng Yao (ICT, CAS), Yun Chen
and Haibin Wang (Huawei),
and Lixin Zhang and Yungang
Bao (ICT, CAS)
·
Improving
Agility and Elasticity in Bare-metal Clouds, Yushi Omote (University of Tsukuba), Takahiro Shinagawa (The
University of Tokyo), and Kazuhiko Kato (University of Tsukuba)
·
Few-to-Many:
Incremental Parallelism for Reducing Tail Latency in Interactive Services, Md E. Haque (Rutgers University),
Yong hun Eom (University of
California, Irvine), Yuxiong He and Sameh Elnikety (Microsoft
Research), Ricardo Bianchini (Rutgers University and
Microsoft Research), and Kathryn McKinley (Microsoft Research)
Session 3A:
Memory and Security II
Chair: Dan Tsafrir,
Technion
·
Protecting
Data on Smartphones and Tablets from Memory Attacks, Patrick J.
Colp (University of British Columbia), Jiawen Zhang, James Gleeson, Sahil
Suneja, and Eyal de Lara
(University of Toronto), and Himanshu Raj, Stefan Saroiu, and Alec Wolman (Microsoft Research)
·
Nested
Kernel: An Operating System Architecture for Intra-Kernel Privilege Separation, Nathan Dautenhahn, Theodoros Kasampalis, and Will Dietz (University of Illinois at
Urbana-Champaign), John Criswell (University of Rochester), and Vikram Adve (University of Illinois at Urbana-Champaign)
Session 3B:
Warehouse Scale Computing II
Chair: Yunji Chen, Inst. Comp. Tech., Chinese Academy of Sciences
·
DIABLO: A
warehouse-scale computer network simulator on FPGAs, Zhangxi
Tan, Zhenghao Qian, Xi
Chen, krste Asanovic, and
David Patterson (UC Berkeley)
·
Sirius: An
Open End-to-End Voice and Vision Personal Assistant and Its Implications for
Future Warehouse Scale Computers, Johann Hauswald, Michael A. Laurenzano,
Yunqi Zhang, Cheng Li, Austin Rovinski,
Arjun Khurana, Ronald G. Dreslinski, Trevor Mudge, Vinicius Petrucci, Lingjia Tang, and Jason Mars (University of Michigan)
Monday,
5:30pm-7:00pm
Chair: John
Criswell, University of Rochester
·
Architecting
Biodegradable Computers, David Wentzlaff, Zhuozhi Yao, and Barry Rand (Princeton University)
·
Performance
Microscopy, Xi Yang,
Steve Blackburn, and Kathryn McKinley (Australian National University and
Microsoft Research)
·
Tortoises
and Hares Among Online Data-Intensive Queries, Christopher Stewart and Jaimie Kelley (The Ohio State University)
·
Ultra-Fine
Grain Power Management at Datapath-Level: Fact or
Fiction, Mehmet E. Belviranli (University of California, Riverside), Weize Yu, and Selçuk Köse (University of South Florida)
·
Taming
Heterogeneous Accelerators: Operating-Systems for Cores with no OS Support, Nils Asmussen and Marcus Völp (Technische Universität Dresden)
·
Hardware
Platform for Graph Processing, Serif Yesil, Naveed Ul Mustafa, and Ozcan Ozturk
(Bilkent University)
Tuesday,
March 17, 2015
Session 4A:
Energy
Chair: Arrvindh
Shriraman, Simon Fraser University
·
Automated
OS-level Device Runtime Power Management, Chao Xu
(Rice University), Felix Xiaozhu Lin (Purdue
University), Yuyang Wang (Tsinghua
University), and Lin Zhong (Rice University)
·
CoolAir: Temperature- and Variation-Aware Management for
Free-Cooled Datacenters, Íñigo Goiri
(Microsoft Research), Thu D. Nguyen (Rutgers University), and Ricardo Bianchini (Rutgers University and Microsoft Research)
·
A
Probabilistic Graphical Model-based Approach for Minimizing Energy Under
Performance Constraints, Nikita Mishra, Huazhe Zhang, John D. Lafferty, and Henry Hoffmann
(University of Chicago)
·
More is
Less, Less is More: Molecular-Scale Photonic NoC
Power Topologies, Jun Pang, Chris Dwyer, and Alvin R. Lebeck
(Duke)
Session 4B:
Reliability
Chair: Emery
Berger, University of Massachusetts, Amherst
·
Memory
Errors in Modern Systems: The Good, The Bad, and The Ugly, Vilas Sridharan (AMD, Inc.), Nathan DeBardeleben
and Sean Blanchard (Los Alamos National Lab), Kurt B. Ferreira and Jon Stearley (Sandia National Labs), John Shalf
(Lawrence Berkeley National Lab), and Sudhanva Gurumurthi (AMD, Inc.)
·
CommGuard: Mitigating Communication Errors in Error-Prone
Parallel Execution, Yavuz Yetim,
Sharad Malik, and Margaret Martonosi (Princeton University)
·
Dual
Execution for On the Fly Fine Grained Execution Comparison, Dohyeong Kim and Yonghwi Kwon
(Purdue University), William N. Sumner (Simon Fraser University), and Xiangyu Zhang and Dongyan Xu (Purdue University)
·
Varan the
Unbelievable: An efficient N-version execution framework, Petr Hosek and Cristian Cadar (Imperial College London)
Session 5A:
I/O and Accelerators
Chair: Ganesh Gopalakrishnan, University
of Utah
·
rIOMMU: Efficient IOMMU for I/O Devices that Employ Ring
Buffers, Moshe Malka, Nadav Amit,
Muli Ben-Yehuda, and Dan
Tsafrir (Technion -- Israel Institute of Technology)
·
PuDianNao: A Polyvalent Machine Learning Accelerator, Daofu Liu, Tianshi Chen, and Shaoli Liu (Institute of Computing Technology, Chinese
Academy of Sciences), Jinhong Zhou (School of
Computer Science and Technology, University of Science and Technology of
China), Shenyuan Zhou (Institute of Computing
Technology, Chinese Academy of Sciences), Olivier Temam
(Inria), Xiaobin Feng (Institute of Computing Technology, Chinese Academy of
Sciences), Xuehai Zhou (School of Computer Science
and Technology, University of Science and Technology of China), and Yunji Chen (Institute of Computing Technology, Chinese
Academy of Sciences)
Session 5B:
Approximation
Chair: Steve
Blackburn, Australian National University
·
ApproxHadoop: Bringing Approximations to MapReduce
Frameworks, Íñigo Goiri (Microsoft Research),
Ricardo Bianchini (Rutgers University and Microsoft
Research), and Santosh Nagarakatte
and Thu D. Nguyen (Rutgers University)
·
Monitoring
and Debugging the Quality of Results in Approximate Programs, Michael Ringenburg and Adrian Sampson (University of Washington),
Isaac Ackerman (Cornell University), and Luis Ceze
and Dan Grossman (University of Washington)
Debate:
It's
time: academic systems venues should require authors to make their code and
data publicly available; those that do not will be held to a higher standard.
Abstract: Most scientific disciplines take reproducibility of
experimental results much more seriously than computer science. (See, for
example, the polices concerning supporting artefacts—such as code and data—of
the Nature
and Science
journals.) In this panel, two teams of highly-opinionated experts will debate
whether it is time to adopt a similar policy in top-tier systems conferences
and journals. The idea is to change the review process such that papers that do
not make their code and data available will be held to a higher standard when
making the accept/reject decision, thereby incentivizing authors to share.
Attendees will be asked to vote whether they are in favor or against at the
beginning and end of the panel.
Moderator: Dan Tsafrir (Technion – Israel Institute of Technology)
Debaters in favor: Emery Berger (University of Massachusetts Amherst),
Steve Blackburn (Australian National University), and Angela Demke Brown
(University of Toronto)
Debaters against: Jim Larus (EPFL), Onur Mutlu (Carnegie Mellon
University), Guri Sohi (University of Wisconsin-Madison)
Wednesday,
March 18, 2015
Keynote II: Watson and the Era of
Cognitive Computing, Guruduth S. Banavar, VP, Cognitive Computing, T. J. Watson Research
Center, IBM
Chair: Kemal
Ebcioglu, Global Supercomputing
·
Bio: Guruduth Banavar is vice president of cognitive computing at IBM
Research, responsible for creating the next generation of cognitive systems in
the Watson family. He has worked across IBM’s businesses to coinnovate
with clients, for example, to build a city operations center in Rio de Janeiro.
Guru has served on Governor Cuomo’s commission for improving New York state’s
resilience to natural disasters after Hurricane Sandy. His work has been
featured in The New York Times, The Economist, and other international media.
Earlier, Guru was the Director of IBM Research in India, which he helped
establish as a pre-eminent center for Services Research and Mobile Computing.
There, he and his team received a National Innovation Award by the President of
India in 2009 for the Spoken Web project. His early work was on distributed
systems and programming models at IBM’s TJ Watson Research Center in New York,
which he joined in 1995 after his PhD in Computer Science.
Session 6A:
Parallelism and Compilation
Chair: Xipeng Shen, North Carolina State
University
·
Ziria: An optimizing compiler for wireless PHY programming, Gordon
Stewart (Princeton), Mahanth Gowda
(UIUC), Geoffrey Mainland (Drexel), Bozidar Radunovic and Dimitrios Vytiniotis (Microsoft Research), and Cristina Luengo Agulló (Polytechnical University of Catalonia)
·
PolyMage: Automatic Optimization for Image Processing
Pipelines, Ravi Teja Mullapudi, Vinay Vasista,
and Uday Bondhugula (Indian
Institute of Science)
·
Compiler
Management of Communication and Parallelism for Quantum Computation, Jeff Heckey (UC Santa Barbara), Shruti
Patil and Ali JavadiAbhari
(Princeton University), Adam Holmes (Cornell University), Daniel Kudrow (UC Santa Barbara), Kenneth R. Brown (Georgia Inst.
of Technology), Diana Franklin (UC Santa Barbara), Frederic T. Chong (UC Santa
Barbara), and Margaret Martonosi (Princeton
University)
·
Kinetic
Dependence Graphs, M. Amber Hassaan, Donald
Nguyen, and Keshav Pingali
(The University of Texas at Austin)
Session 6B:
Testing and Tainting, Verification and
Security
Chair: Josep
Torrellas, University of Illinois at Urbana-Champaign
·
Targeted
Automatic Integer Overflow Discovery Using Goal-Directed Conditional Branch
Enforcement, Stelios Sidiroglou-Douskos,
Eric Lahtinen, Nathan Rittenhouse, Paolo Piselli, Fan Long, Deokhwan Kim,
and Martin Rinard (MIT CSAIL)
·
Architectural
Support for Software-Defined Metadata Processing, Udit Dhawan (University of Pennsylvania), Catalin
Hritcu (INRIA), Raphael Rubin and Nikos Vasilakis (University of Pennsylvania), Silviu
Chiricescu (BAE Systems), Jonathan M. Smith
(University of Pennsylvania), Tom F. Knight (Ginkgo Bioworks),
and Benjamin C. Pierce and Andre DeHon (University of
Pennsylvania)
·
A Hardware
Design Language for Timing-Sensitive Information-Flow Security, Danfeng Zhang, Yao Wang, G. Edward Suh,
and Andrew C. Myers (Cornell University)
·
SPECS: A
Lightweight Runtime Mechanism for Protecting Software from Security-Critical
Processor Bugs, Matthew Hicks (University of Michigan), Cynthia Sturton
(University of North Carolina), Samuel T. King (Twitter, Inc.), and Jonathan M.
Smith (University of Pennsylvania)
Session 7A:
Memory Models 2
Chair: Hans Boehm,
Google
·
Asymmetric
Memory Fences: Optimizing Both Performance and Implementability, Yuelu Duan, Nima
Honarmand, and Josep Torrellas (University of
Illinois, Urbana-Champaign)
·
DeNovoSync: Efficient Support for Arbitrary Synchronization
without Writer-Initiated Invalidations, Hyojin
Sung and Sarita V. Adve (University of Illinois at Urbana-Champaign)
·
Hybrid
Static-Dynamic Analysis for Statically Bounded Region Serializability, Aritra Sengupta, Swarnendu Biswas, Minjia Zhang, and Michael D. Bond (Ohio State University)
and Milind Kulkarni (Purdue
University)
Session 7B:
GPUs
Chair: Ozcan
Ozturk, Bilkent University
·
GPU
Concurrency: Weak Behaviours and Programming
Assumptions, Jade Alglave (University College London),
Mark Batty (University of Cambridge), Alastair Donaldson (Imperial College
London), Ganesh Gopalakrishnan
(University of Utah), Jeroen Ketema
(Imperial College London), Daniel Poetzl (Oxford
University), Tyler Sorensen (University of Utah), and John Wickerson
(Imperial College London)
·
Chimera:
Collaborative Preemption for Multitasking on a Shared GPU, Jason Jong Kyu Park (University of Michigan), Yongjun
Park (Hongik University), and Scott Mahlke (University of Michigan)
·
Page
Placement Strategies for GPUs within Heterogeneous Memory Systems, Neha Agarwal
(University of Michigan/NVIDIA) and David Nellans,
Mark Stephenson, Mike O'Connor, and Stephen W. Keckler
(NVIDIA)
Session 8A:
Scalable Parallelism
Chair: Osman Unsal,
Barcelona Supercomputing Center
·
On-the-Fly Principled
Speculation for FSM Parallelization, Zhijia
Zhao (College of William and Mary) and Xipeng Shen (North Carolina State University)
·
Asynchronized Concurrency: The Secret to Scaling Concurrent Search
Data Structures, Tudor David, Rachid Guerraoui,
and Vasileios Trigonakis
(EPFL)
·
iThreads: A Threading Library for Parallel Incremental
Computation, Pramod Bhatotia
and Pedro Fonseca (MPI-SWS), Umut A. Acar (Carnegie
Mellon University & Inria), Björn
B. Brandenburg (MPI-SWS), and Rodrigo Rodrigues (Nova University of Lisbon/
CITI / NOVA-LINCS)
Session 8B:
Memory Management
Chair: Alper
Buyuktosunoglu, IBM
·
NumaGiC: a Garbage Collector for Big Data on Big NUMA
Machines, Lokesh Gidra (LIP6-INRIA/UPMC), Gaël Thomas (SAMOVAR-Telecom SudParis),
Julien Sopena
(LIP6-UPMC/INRIA), Marc Shapiro (LIP6-INRIA/UPMC), and Dang Nhan
Nguyen (Chalmers university of technology)
·
Facade: A
Compiler and Runtime for (Almost) Object-Bounded Big Data Applications, Khanh Nguyen, Kai Wang, Yingyi
Bu, Lu Fang, Jianfei Hu,
and Guoqing (Harry) Xu
(University of California, Irvine)
·
Architectural
Support for Dynamic Linking, Varun Agrawal,
Abhiroop Dabral, Tapti Palit, Yongming Shen, and Michael Ferdman (Stony
Brook University)